456 Palmetto Dr.
Sunnyvale, CA 94086
PROFESSIONAL SUMMARY: Over 25 years of Senior Engineering Management for the design and development of complex Integrated Circuits. Most recently held positions: VP of Engineering, VP of Operations and Technology, Corporate Officer, and Senior Management Consultant. Have delivered system level solutions to the marketplace. Experience in a variety of companies both large and small. Product experience includes: Workstations, state-of-the-art microprocessors, SOC, consumer products, RFID, ASIC’s, and custom circuits. Currently running a successful consulting business but open to a meaningful, full time opportunity.
2004 – Present: SIMONE CONSULTING SERVICES, Sunnyvale, CA
SENIOR MANAGEMENT CONSULTANT
Independent senior management consultant in the area of fabless semiconductor, and semiconductor design and development. Areas of expertise include: SOC and Advanced Microprocessor Development, Expert Witness, Fund Raising, Mentoring, Contract Negotiations, Technology Partnerships, Yield Improvements, Time-to-Market, Price Setting, Scheduling, Staffing, and Overall Senior Management. Current with latest tools and methodologies for advanced IC designs. Client list includes: Zilog, Silicon Clocks, Arteris, Neology, Audience, Sonics, Tallwood, SandCraft, nBand, ServiceHub, SSL, 3DFX, National Semiconductor, Mentor Graphics, Silicon Valley Expert Witness, and Teklicon. A summary of consulting assignments will be provided upon request.
2003-2004: SONICS, INC., Mountain View, CA
VICE PRESIDENT OF ENGINEERING
Initially retained as the program, manager for the SMART Interconnect Product, and to determine the issues and roadblocks that kept this project from moving to completion. Two months later installed as acting VP of Engineering. Successfully completed the project after reorganizing the effort, retaining outside consultants to enhance the staff, and managing the team through many significant issues. Also chartered to retain a fragile relationship with the initial key customer, TI. At this time TI is one of Sonics largest customers and the product is very successful in the marketplace, shipping in millions of components.
2000-2001: SANDCRAFT, INC., Santa Clara, CA
VICE PRESIDENT OF ENGINEERING
Responsible for the design and development of advanced MIPs processor on .15um and .13um, 7 layer, copper technology. Delivered 2 processors to working samples during an 18-month period. Both booted the customer OS and ran to expected speeds, 600Mhz and 800Mhz respectively. Developed plans and started .13um, 1.6Ghz multiprocessor to be delivered in 1Q03. Successfully managed a team of 90-100 engineers and delivered the products under budget and within 1 month of original schedule. Provided technical interface to UMC fab engineering and mask making. Worked closely with CEO and executive staff to provide strategy plans and budgets in a start-up environment. Presented to BOD at regular intervals.
1998 – 1999: OAK TECHNOLOGY, Sunnyvale, CA
VICE PRESIDENT OF TECHNOLOGY AND OPERATIONS, CORP. OFFICER
Responsibilities included: CAD and Design Methodology, Libraries, Place and Route, PE, QA, IS, HR, and all vendor relationships for a fabless semiconductor company. Accomplishments included: stabilizing .35um and installing .25um technology enabling the successful tape out of 23 circuits, reduced product costs by 25-30% across the board, renegotiated/reduced wafer deposit agreement by $36M. Accomplished this while reducing budget by $3M and maintaining zero turn over rate. Worked with the President to reduce Oak expenses by $4-5M/year and to drive other restructuring plans. Corporate Y2K godfather.
1992 – 1996: HAL COMPUTER, Campbell, CA
SENIOR DIRECTOR of IC DESIGN
Managed a group of 45+ engineers in the development of 14 CMOS, integrated circuits, which make up the chip set for a super scalar, 64 bit, SPARC workstation. Chip set contained more than 22M transistors. Total development team consisted of 125 engineers. First generation successfully completed and workstation introduced. Designs used advanced state-of-the-art, semiconductor, packaging, and test technology.
1990 – 1992: SUN MIRCOSYTEMS, Mountain View, CA
STRATEGIC COMPONENT PROGRAM MANAGER
Managed SUN and vendor resources to deliver a quality supply of critical semiconductor components to meet development and manufacturing objectives. Identified, promoted, and implemented advanced technologies to ensure product leadership. Responsible for vendor selection process, business agreements, and supplier relationship. Deliverables included: optimized time to market/money, optimized quality and reliability, and a sufficient quantity of critical components to meet market demands.
1983 – 1990: INTEL, Santa Clara, CA
DIRECTOR OF CENTRAL DEVELOPMENT ENGINEERING (1989-1990)
Led Intel’s Time-to-Market improvement program. Managed 25 engineers who set company wide design standards and methodologies. Methodologies included: Functional and Physical Design, Performance Verification, Module, Fault Grading, and Testability. Developed and maintained standard cell libraries for all Intel.
80486 PROGRAM MANAGER (1988)
Managed activities related to developing and delivering the 80486 microprocessor and associated peripherals, systems, and software to the marketplace. Program spanned all of the divisions within Intel. Completed this assignment on schedule with the successful 80486 introduction.
80386 SENIOR DESIGN MANAGER (1986-1987)
Managed a group of 25 engineers and 14 layout designers in ramping the 80386 into production. This included: fixing bugs, speed and yield improvements, cost reduction, interfacing with all fabs and fault grading. Delivered 1M devices, far more than were anticipated, in first 2 years enabling Intel to meet the overwhelming customer demand. Redesigned the chip into next generation technology improving yield by 8X and speed by 2.5X.
MICROPROCESSOR SENIOR DESIGN MANAGER (1983-1985)
Managed a group of 56 engineers, layout designers, and computer support personnel. Responsible for: 8086, 8088, 8087, 80287, Clocks, DMA’s and Special Products. Directed all layout design and the computer room for the division.
1980 – 1983: HONEYWELL SSED, Santa Clara, CA – Director SV Design Center
1979 – 1980: MARUMAN INTEGRATED CIRCUITS, Sunnyvale, CA – Director of Eng.
1977 – 1979: ATARI, Sunnyvale, CA – LSI Design Manager
1972 – 1977: National Semiconductor, Santa Clara, CA – LSI Design Manager
AFFILIATIONS: Associate of Tallwood Venture Capital, and Strategic Alternatives. Mentor for CCTO & FuelMotion, Advisor to ChinaVest. Fabless Semiconductor Association IP Committee. Board member of Service Hub. Silicon Valley Expert Witness, National Expert Witness, and Teklicon.
MSEE, Iowa State University
BSEE, Milwaukee School of Engineering
References provided upon request